Basic design and simulation of a LDO voltage regulator

During the first semester of the Master in Microsystem Engineering course at Hochschule Furtwangen the students have to prepare a presentation on a topic, together with a paper as handout.

My topic was „Design and simulation of a LDO voltage regulator“, it was aimed at an audience not familiar with analogue design and covers some basics which will be clear to any electrical engineer. This article will provide additional data. The handout is available for a download:
Design and simulation of a LDO voltage regulator
The handout is written completely in \LaTeX, including the circuit and diagrams.

Additional to this handout, I want to give access to my simulation files and the measured data from my breadboard design.

As simulation program LTSpice IV was used. So there are multiple files used for this simulation. They are all packed and available for download: here.

The breadboard design looked like this:

And the measured waveform for an unstable configuration using no output capacitor:

This waveform is also available as comma separated file.

If someone can provide some more insight on the analytical approach, especially on how to extract those parameters like the OpAmp resistance, I’d be happy, as I didn’t understand that part very well to be honest.

Note that you can use LaTeX for math in comments:

[latex] formula [/latex]
or: $latex formula $
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Freitag, 25. Februar 2011 Elektronik

2 Comments zu Basic design and simulation of a LDO voltage regulator

  • Pankaj Chugh sagt:

    Would it be possible to share any thesis you have on LDO with me if you have one. I read your paper and found it to be interesting and helpful.


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